Unleashing Power of AMD EPYC 9005 Turin
The AMD EPYC 9005 has officially launched. Just as Intel Xeon 6900P was reasserting Intel Server Leadership a few weeks prior, the new AMD EPYC 9005 delivered what could be described as a remarkable performance boost. AMD’s strategy was straightforward: increase the thermal design power (TDP) by over 25% and raise core counts by 50%. The introduction of new process technology and updates to the server processors utilizing the Zen 5 and Zen 5c architecture have led to the launch of these latest AMD EPYC processors, which are achieving outstanding performance levels.
As expected for a significant industry event, we also have a video version available:
For an optimal viewing experience, it is recommended to watch this in its own browser, tab, or app. AMD EPYC 9005 provided the hardware utilized for our testing, which included the server platform and three sets of SKU configurations, and we must note that this sponsorship comes from AMD. Additionally, we supplemented the setup with components sent by Solidigm and Broadcom, which we decided to incorporate for this review.
One of the critical insights gained during our performance evaluations was that utilizing slower SSDs and network interface cards (NICs) resulted in a significant decrease in performance, particularly when operating with a configuration of 192 cores.
While neither of the companies specifically provided us with these components for this article, we had the samples available and decided to utilize them. It’s important to mention that this content is sponsored by Solidigm and Broadcom. Now that we’ve cleared that up, let’s dive into the details.
AMD EPYC 9005 “Turin” SKUs
We’ll begin with the first significant change. The AMD EPYC “Turin” represents the latest generation, featuring the Zen 5 and Zen 5c server processors.
As the SKU lineup and pricing are crucial aspects, let’s start with what many of you are eager to know:
AMD has unveiled its Zen 5c core lineup, featuring core counts that range from 96 to 192 cores. Notably, these are all categorized under “Turin,” which means there is no separation between the Genoa or Bergamo architectures. Initially, when we powered on our testing platform, I spotted the AMD EPYC 9755 and mistakenly assumed it was a Zen 5c component, similar to how the EPYC 9754 was classified as a Zen 4c model.
This assumption was incorrect. AMD EPYC 9005 has strategically aimed to unify its offerings, a move that makes considerable sense. While Intel distinguishes between P-cores and E-cores as separate architectures, including variations with and without SMT, AMD is asserting that it maintains the same instruction set across varying core counts, clock speeds, and cache sizes. This is a commendable strategy from AMD EPYC 9005.
Among the offerings, two SKUs are rated at 500W, necessitating updated power delivery mechanisms in compatible platforms. We do have “P” series single-socket SKUs available, but they are capped at 96 cores, marking a significant departure from AMD’s earlier generations, as we are not seeing a full core count in the P-series line anymore.
One of the more exciting chips is the AMD EPYC 9175F, which features 16 cores and is particularly advantageous for Microsoft and other per-core licensing scenarios. It boasts a 5GHz turbo speed and 512MB of L3 cache, translating to 32MB per core. This chip could be a powerhouse for those operating on a per-core payment structure.
AMD’s pricing strategy appears to be quite aggressive when compared to Intel’s offerings in this generation. Intel’s list prices seem geared towards discounts, while AMD seems to be following a distinct path.
As for updates on Genoa-X, we have not received any news in this generation. AMD EPYC 9005 has indicated that Genoa-X remains a robust platform, yet we are left without roadmap updates beyond this point. With Turin positioned as a product for the mass market, it’s essential to be realistic. For those looking to build a storage server, such as a 24-bay hard drive setup, or any application that doesn’t require the full capabilities of the 12-channel SP5 socket or PCIe Gen5, it may be wiser to consider AMD EPYC Siena, Milan, or the EPYC 4004 series.
Earlier this year, we delved into the enhancements brought by the Zen 5 and Zen 5c. It’s important to note that unlike client processors, server chips will feature either Zen 5 or Zen 5c, but not a combination of both.
For those acquainted with the 4th Gen AMD EPYC SoCs, the upcoming release will be significant. Below, we outline the key features of the new SoCs, with major distinctions such as core configurations, 512b AVX-512, memory speeds, CXL support, and more highlighted. This information is likely to be of interest to many at STH.
Nonetheless, the core instruction set remains consistent across the two, differentiating them from Intel’s mix of P and E cores. Instead, we should regard these new cores as having been fine-tuned in terms of frequency, power, cache, and density profiles. In contrast to Intel’s two-platform model (the Xeon 6700 and Xeon 6900 series), AMD EPYC 9005 combines high-core-density Zen 5c cores with the higher cache and clock speed Zen 5 cores within distinct CCDs and packages.
I inquired with AMD EPYC 9005 regarding the support for 32x SATA, as it appears to be a rather inefficient allocation of lanes. AMD acknowledged that this might not be the most practical solution at present, but it is necessary for platform compatibility. I believe we might witness a reduction in SATA support in future generations, as this older feature can be adequately managed through add-in cards for applications that still require it.
AMD remains capable of utilizing its I/O lanes for either socket-to-socket configurations or as additional PCIe lanes for single socket servers. In terms of single socket offerings, AMD EPYC 9005 provides more PCIe Gen5 I/O compared to the Intel Xeon 6900P; however, the upcoming Intel R1S single-socket solution is expected to surpass that. In dual processor configurations, the Intel Xeon 6900P supports 192 PCIe Gen5 lanes, while AMD can offer up to 160 lanes. This competition is beneficial for the market!
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